| IBM publishes Cell processor docs |
Aug. 29, 2005
IBM has published an overview and specifications of the Cell processor architecture -- formally known as the "Cell Broadband Engine Architecture" (CBEA) -- on its developerWorks website. The overview, written by IBM architect Dr. H. Peter Hofstee, provides a brief introduction to the processor's unique structure and its programming implications.
Earlier this year, IBM, Sony, and Toshiba disclosed the architectural design of the jointly developed, multi-core "Cell" processor, described as featuring eight synergistic processors, with supercomputer-like floating-point performance and clock speeds in excess of 4 GHz. At the time, the companies claimed that Cell delivers "vastly improved, real-time response for entertainment and rich media applications, in many cases 10 times the performance of the latest PC processors." Examples of anticipated applications include digital televisions, home servers, and supercomputers.
The Cell documents now available on developerWorks, along with IBM's descriptions of them, are: - Cell architecture from 20,000 feet -- A high-level description of the Cell Broadband Engine (CBE), the Synergistic Processing Elements (SPEs), and how they work together.
- Cell Broadband Engine Architecture V1.0 -- Like the Power Architecture, but different -- the CBE Architecture builds upon knowledge contained in the Power Architecture "books" and describes the app-level User Mode Environment (UME) and the OS-level Privileged Mode Environment (PME) in astonishingly rich detail. (PDF -- requires registration)
- Synergistic Processor Unit (SPU) Instruction Set Architecture V1.0 -- Somewhere between a general-purpose processor and special-purpose hardware lies the Cell SPU: designed to provide leadership performance in game, media, and broadband applications, this document describes the Application Binary Interface (ABI) of the Synergistic Processor Unit (SPU). Get to know all of its instructions. (PDF -- requires registration)
- SPU Application Binary Interface Specification V1.3 -- Including low-level system and language binding information, information on loading and linking, and coding examples, this specification defines the system interface for SPU-targeted object files to help ensure maximum binary portability across implementations. (PDF -- requires registration)
- SPU Assembly Language Specification V1.2 -- Unleash the full processing power of the SPUs -- you know you want to! This specification will prove an indispensable aid in your efforts as it takes you on a carefully-worded journey describing SPU assembly-level syntax and machine-dependent features for the GNU assembler (but serves as an example specification for other SPU assemblers as well). (PDF -- requires registration)
- SPU C/C++ Language Extensions V2.0 -- Describes the basic data types, operations on these data types, and directives and program controls required by the CBE specification; includes sample code. (PDF -- requires registration)
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